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FHP3392 -- Fixed-Gain, 5V, Triple 2:1, High-Speed Video Multiplexer July 2007 FHP3392 -- Fixed-Gain, 5V, Triple 2:1, High-Speed Video Multiplexer Features 0.1dB gain flatness to 102MHz at 2VPP 9ns channel switching time <0.02%/0.03 differential gain/phase error 750MHz large signal -3dB bandwidth 2,600V/s slew rate 60mA output current (easily drives two video loads) 70dB channel to channel isolation 25mA supply current 7mA supply current when disabled Fully specified at 5V supplies Lead-free TSSOP-24 package Description The FHP3392 (G=2) is a triple 2:1 analog multiplexer designed for high-speed video applications. The output amplifiers offer a fixed gain of 6dB and stellar large signal performance of 335MHz -3dB bandwidth and 80MHz 0.1dB bandwidth. The 2VPP bandwidth performance and 1,600V/s slew rate exceed the requirements of high-definition television (HDTV) and other multimedia applications. The output amplifier provides ample output current to drive multiple video loads. The FHP3392 may be operated with dual power supplies from 2.5V to 6V. The FHP3392 consumes only 25mA of supply current and offer disable capability. While disabled, it consumes only 7mA and the outputs become high impedance, allowing multiplexer expansion with multiple FHP3392s. Applications RGB video switchers and routers Multiple input HDTV switching Picture-in-picture video switch Multi-channel ADC Driver Ordering Information Part Number FHP3392IMTC24X PbFree Yes Gain 6dB Operating Temperature Range -40C to +85C Package 24-Lead,Thin Shrink Outline Package, JEDEC MO-153, 4.4mm Wide Packing Method Tape and Reel Moisture sensitivity level for all parts is MSL-1. (c) 2006 Fairchild Semiconductor Corporation FHP3392 Rev. 1.0.0 www.fairchildsemi.com FHP3392 -- Fixed-Gain, 5V, Triple 2:1, High-Speed Video Multiplexer Block Diagram and Pin Configuration Figure 1. Block Diagram and Pin Configuration Pin Definitions Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Name IN1A DGND IN2A GND 1N3A +Vs -Vs IN3B GND IN2B GND IN1B +VS +DVs -VS OUT3 +Vs OUT3 -VS OUT1 +VS SEL A/B EN +VS Description 1st Input Channel A Digital Ground, must be connected to ground 2nd Input Channel A Must be connected to ground 3rd Input Channel A Positive supply Negative supply 3rd Input Channel B Must be connected to ground 2nd Input Channel B Must be connected to ground 1st Input Channel B Positive supply Digital positive supply Negative supply 3rd output Positive supply 2nd output Negative supply 1st Output Logic input; "0" = Channel A, "1" = Channel B Enable pin; "0" = Enable, "1" = Disable; Enabled if left floating or grounded Enable Pin: "0" = Channel A, "1" = Channel B Positive supply Truth Table SEL A / B 0 1 X (c) 2006 Fairchild Semiconductor Corporation FHP3392 Rev. 1.0.0 EN 0 0 1 OUT Channel A Channel B Disable www.fairchildsemi.com 2 FHP3392 -- Fixed-Gain, 5V, Triple 2:1, High-Speed Video Multiplexer Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VCC VIN Supply Voltage Input Voltage Range Parameter Min. 0 -VS - 0.5 Max. 13.3 +VS + 0.5V Unit V V Electrostatic Discharge Protection Symbol ESD Parameter Human Body Model (HBM) Charged Device Model (CDM) Min. Max. 3 12 Unit kV kV Reliability Information Symbol TJ TSTG TRF JA Parameter Junction Temperature Storage Temperature Reflow Temperature Thermal Resistance Min. -65 Typ. Max. 150 150 260 Unit C C C C/W 87 Note: 1. Thermal Resistance (JA) JEDEC standard, multi-layer test boards, in still air. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol TA VCC Parameter Operating Temperature Range Supply Voltage Range Min. -40 2.5 Typ. Max. +85 Unit C V 5.0 6.0 (c) 2006 Fairchild Semiconductor Corporation FHP3392 Rev. 1.0.0 www.fairchildsemi.com 3 FHP3392 -- Fixed-Gain, 5V, Triple 2:1, High-Speed Video Multiplexer Electrical Characteristics at 5V TA = 25C, VS = 5V, RL = 150; unless otherwise noted. Symbol BW SS BW LS BW 0.1dBSS BW 0.1dBLS Parameter -3dB Bandwidth Large Signal Bandwidth 0.1dB Gain Flatness 0.1dB Gain Flatness Conditions VOUT = 0.2VPP VOUT = 2.0VPP VOUT = 0.2VPP VOUT = 2.0VPP Min. Typ. 750 560 117 102 Max. Units MHz MHz MHz MHz Frequency Domain Response Time Domain Response tS SR HD2 HD3 THD DG DP en in SNR Settling Time to 0.1% Slew Rate Second Harmonic Distortion Third Harmonic Distortion Total Harmonic Distortion Differential Gain Differential Phase Input Voltage Noise Input Current Noise Signal-to-Noise Ratio VOUT = 2V step 4V step 2VPP, 5MHz 2VPP, 5MHz 2VPP, 5MHz 2VPP, 22MHz NTSC (3.58MHz) NTSC (3.58MHz) >1MHz >1MHz NTC-7 weighting, 4.2MHz LP filter, 100kHz PH filter VOUT = 2VPP, ch-to-ch, 5MHz VOUT = 2VPP, ch-to-ch, 30MHz (2) 4 2600 -85 -90 -84 -72 0.04 0.01 6.75 22 90 -59 ns V/s dBc dBc dB dB % nV/Hz pA/Hz dB Distortion / Noise Response Xtalk All Hostile Crosstalk dB -56 DC Performance VOS Ib G GM PSRR IS IEN Output Offset Voltage Input Bias Current Gain (2) (2) VIN = 0 DC Channel-to-channel, DC (2) -18 -30 1.9 2 4 2.0 0.05 18 30 2.1 mV A V/V % dB Gain Matching Power Supply Rejection Ratio Supply Current (2) (2) DC, VCM = 0, input referred, SEL = X No load, EN = 0 EN = 1 Channel-to channel (3) 54 62 25 7 30 10 mA mA Disable Supply Current Switching Characteristics Switching Time 50% Logic to: TS 90% Output (10% Output Setting) 99% Output (1% Output Setting) VSW Ch A inputs = +0.5V Ch B inputs = -0.5V Ch A inputs = +0.5V Ch B inputs = -0.5V All inputs grounded 17.3 36 34 ns ns mVPP (3) Channel Switching Transient (Glitch) Notes: 2. 100% tested at 25. 3. EN pin is grounded, channel A inputs = 0.5V, channel B inputs = -0.5V. Switching time is the transition time from 50% of SEL input value (+2.5V) to the time at which the switched channel is at 90% (or 99%) of its final value. (c) 2006 Fairchild Semiconductor Corporation FHP3392 Rev. 1.0.0 www.fairchildsemi.com 4 FHP3392 -- Fixed-Gain, 5V, Triple 2:1, High-Speed Video Multiplexer Electrical Characteristics at 5V (Continued) TA = 25C, VS = 5V, RL = 150; unless otherwise noted. Symbol Digital Inputs VIH VIL IIH IIL Parameter Logic HIGH Threshold Logic LOW Threshold Logic Pin Input Current HIGH Logic Pin Input Current LOW Conditions SEL and EN pins SEL and EN pins (4) (4) Min. 2.0 Typ. Max. Units V 0.8 27 0 V A A SEL and EN pins; Logic Input = 2V SEL and EN pins; Logic Input = 0V Disable Characteristics 5MHz, VIN = 1VPP, EN = 1 30MHz, VIN = 1VPP, EN = 1 5MHz VIN = 0.5V VIN = 0.5V -81 -66 -71 30 65 115 10 2 RL = 2k RL = 150 VO = GND Enabled, EN = 1, 100kHz Disabled, EN = 1, 100kHz Disabled, EN = 1, 100kHz (4) dB dB dB ns ns k pF V V V mA mA pF ENISO Disable Isolation CHISO ENTON ENTOFF RIN CIN VIN Channel-to-Channel Isolation Turn-on-Time (Disable to ON) Turn-off-Time (ON to Disable) Input Resistance Input Capacitance Input Voltage Range Input Characteristics Output Characteristics VO IOUT ISC ROUT Output Voltage Swing Linear Output Current Short Circuit Output Current Output Resistance, Closed Loop 4 3.2 3.7 95 100 0.17 675 2.7 COUT Output Capacitance Note: 4. 100% tested at 25. (c) 2006 Fairchild Semiconductor Corporation FHP3392 Rev. 1.0.0 www.fairchildsemi.com 5 FHP3392 -- Fixed-Gain, 5V, Triple 2:1, High-Speed Video Multiplexer Physical Dimensions Dimensions are in millimeters unless otherwise noted. Figure 2. 24-Lead,Thin Shrink Outline Package, JEDEC MO-153, 4.4mm Wide (c) 2006 Fairchild Semiconductor Corporation FHP3392 Rev. 1.0.0 www.fairchildsemi.com 6 FHP3392 -- Fixed-Gain, 5V, Triple 2:1, High-Speed Video Multiplexer (c) 2006 Fairchild Semiconductor Corporation FHP3392 Rev. 1.0.0 www.fairchildsemi.com 7 |
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